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RISC vs CISC 2
- Thread starter fenix
- Start date
DaveGoTech
Programmer
To maintain compatability and provide new functions, the instruction count is rising. The PIII added 70 new instructions.
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- #3
Karl Blessing
Programmer
I thought all x86 processors were RISC. (or is it the other way around [CISC]) Karl Blessing aka kb244{fastHACK}
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2
- #5
butchrecon
MIS
All Intel Pentium (MMX, II, III, 4, XEON, PRO) line of processor are CISC (complex instructions set computers) processor. I do not believe (I will have to double check my notes) they are a hybrid of the two because of the incompatibility in the architecture of the processor.
Any one have any thoughts? James Collins
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
Any one have any thoughts? James Collins
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
- Thread starter
- #6
hi again, I'm new to the field and studying A+ material for starters and plan to take the test in July. I subscribe to Question of the Day from three different sources. A few days ago, I received a question, 'What technology does the Pentium (P5)
use' RISC, DISC, CISC, or another choice I can't remember. I selected CISC and the correct answer according to them was RISC. I didn't agree and started researching my study materials. All I could find was in an A+ textbook by Jean Andrews that 'starting with the PII, intel used a combination of both technologies', which wasn't very helpful. (Not really sure what this means, or what the P5 designates after Pentium in the original question) This is when I turned to this forum to pick some brains for some opinions. The first reply indicated 70 new instructions for the PIII, which by definition seems to indicate Complex Instruction set. Not sure what the point of the second reply was. 3rd reply seems to go along with my thoughts. Maybe more input will clear this up. Thx all, even the funny one.
use' RISC, DISC, CISC, or another choice I can't remember. I selected CISC and the correct answer according to them was RISC. I didn't agree and started researching my study materials. All I could find was in an A+ textbook by Jean Andrews that 'starting with the PII, intel used a combination of both technologies', which wasn't very helpful. (Not really sure what this means, or what the P5 designates after Pentium in the original question) This is when I turned to this forum to pick some brains for some opinions. The first reply indicated 70 new instructions for the PIII, which by definition seems to indicate Complex Instruction set. Not sure what the point of the second reply was. 3rd reply seems to go along with my thoughts. Maybe more input will clear this up. Thx all, even the funny one.
- Thread starter
- #7
hi again, I'm new to the field and studying A+ material for starters and plan to take the test in July. I subscribe to Question of the Day from three different sources. A few days ago, I received a question, 'What technology does the Pentium (P5)
use' RISC, DISC, CISC, or another choice I can't remember. I selected CISC and the correct answer according to them was RISC. I didn't agree and started researching my study materials. All I could find was in an A+ textbook by Jean Andrews that 'starting with the PII, intel used a combination of both technologies', which wasn't very definitive. (Not really sure what this means, or what the P5 designates after Pentium in the original question) This is when I turned to this forum to pick some brains for some opinions. The first reply indicated 70 new instructions for the PIII, which by definition seems to indicate Complex Instruction set. Not sure what the point of the second reply was. 3rd reply seems to go along with my thoughts. Maybe more input will clear this up. Thx all.
use' RISC, DISC, CISC, or another choice I can't remember. I selected CISC and the correct answer according to them was RISC. I didn't agree and started researching my study materials. All I could find was in an A+ textbook by Jean Andrews that 'starting with the PII, intel used a combination of both technologies', which wasn't very definitive. (Not really sure what this means, or what the P5 designates after Pentium in the original question) This is when I turned to this forum to pick some brains for some opinions. The first reply indicated 70 new instructions for the PIII, which by definition seems to indicate Complex Instruction set. Not sure what the point of the second reply was. 3rd reply seems to go along with my thoughts. Maybe more input will clear this up. Thx all.
butchrecon
MIS
P5? New Intel Processor? Anyway. I have not done a lot of research on this. RISC processor are reduced instruction sets. Intel keeps adding instruction sets to their processors (along with new Architectures.) So What really is the answer? Lets review the differances:
CISC stands for complex instruction set computer and is the name given to processors that use a large number of complicated instructions, to try to do more work with each one.
RISC stands for reduced instruction set computer and is the generic name given to processors that use a small number of simple instructions, to try to do less work with each instruction but execute them much faster.
The x86 instruction set is CISC in design. It contains a large number of instructions, some of which can perform some rather complicated functions, and can require many clock cycles to execute. BUT.......
These latest processors do more than blur the line between the two, they really use both! The internal execution core of this type of CPU is actually a "machine within the machine", that functions internally as a RISC processor but externally like a CISC processor. The way this works is explained in more detail in other sections in this area, but in a nutshell, it does this by translating (on the fly, in hardware) the CISC instructions into one or more RISC instructions. It then processes these using multiple RISC execution units inside the processor core.
This design has been created to allow PC processors to reap the benefits of RISC instruction sets while maintaining compatibility with existing x86 code. The internal RISC core is more suited to implementing many of the more advanced performance-enhancing architectural features, as well as being easier to run at much higher clock speeds. Faster clock speeds mean less time to perform each instruction, and therefore it makes sense to chop the large, complicated CISC x86 instructions into more "digestible" pieces to gain performance as clock speeds exceed 200 MHz. From the user's perspective, this additional layer of translation is totally invisible, since it happens entirely within the processor itself.
So as you can see x86 really are a "Hybrid" of sorts of both RISC and CISC. So my first post was incorrect. (I WAS WRONG! The HORROR!) LOL
James Collins
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
CISC stands for complex instruction set computer and is the name given to processors that use a large number of complicated instructions, to try to do more work with each one.
RISC stands for reduced instruction set computer and is the generic name given to processors that use a small number of simple instructions, to try to do less work with each instruction but execute them much faster.
The x86 instruction set is CISC in design. It contains a large number of instructions, some of which can perform some rather complicated functions, and can require many clock cycles to execute. BUT.......
These latest processors do more than blur the line between the two, they really use both! The internal execution core of this type of CPU is actually a "machine within the machine", that functions internally as a RISC processor but externally like a CISC processor. The way this works is explained in more detail in other sections in this area, but in a nutshell, it does this by translating (on the fly, in hardware) the CISC instructions into one or more RISC instructions. It then processes these using multiple RISC execution units inside the processor core.
This design has been created to allow PC processors to reap the benefits of RISC instruction sets while maintaining compatibility with existing x86 code. The internal RISC core is more suited to implementing many of the more advanced performance-enhancing architectural features, as well as being easier to run at much higher clock speeds. Faster clock speeds mean less time to perform each instruction, and therefore it makes sense to chop the large, complicated CISC x86 instructions into more "digestible" pieces to gain performance as clock speeds exceed 200 MHz. From the user's perspective, this additional layer of translation is totally invisible, since it happens entirely within the processor itself.
So as you can see x86 really are a "Hybrid" of sorts of both RISC and CISC. So my first post was incorrect. (I WAS WRONG! The HORROR!) LOL
James Collins
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
- Thread starter
- #9
James, you really nailed it this time. Now I understand why the newer Pentiums are called 'hybrid'. Thanks for your time to answer my question. I'm sure it will be informative to others as well. And also, if one had only one choice between complex and reduced, as on a test, I guess the answer RISC is correct after all. 5 star answer!
Also, my understanding is that Cyrix doesn't use RISC at all, and AMD processors such as the K6-II and III, and the Athlon line are 'completely' RISC. Would you mind addressing this when you get a chance?
Also, my understanding is that Cyrix doesn't use RISC at all, and AMD processors such as the K6-II and III, and the Athlon line are 'completely' RISC. Would you mind addressing this when you get a chance?
Karl Blessing
Programmer
if what he stated holds true, then Athlons would have to be hybrids as well to compete, and older chips may be pure CISC because to keep "x86 compatible" the outer "shell" has to be CISC so newer chips for PC either have to be 100% CISC or a hybrid with CISC external, and RISC internal.
Karl Blessing aka kb244{fastHACK}
Karl Blessing aka kb244{fastHACK}
butchrecon
MIS
So far on what I can find The AMD series of processors are Hybrid as well. BUT...
The AMD chips incorporate more RISC design than Intel does. Making them more of a RISC based processor than Intel. I will do some more digging when I get time today. James Collins
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
The AMD chips incorporate more RISC design than Intel does. Making them more of a RISC based processor than Intel. I will do some more digging when I get time today. James Collins
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
Karl Blessing
Programmer
I heard that Macs run on a completely RISC artitecture. Karl Blessing aka kb244{fastHACK}
butchrecon
MIS
As far as I know that is correct. Mac OS will not run nativaly on x86 processors. James Collins
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
Computer Hardware Engineer
A+, MCP
email: butchrecon@skyenet.net
Karl Blessing
Programmer
well that would explain why their core speeds are so low, it doesnt require as many cycles to run. Karl Blessing aka kb244{fastHACK}
- Thread starter
- #16
If in doubt get the Ball Pein Hammer outCSG
(Used to be MOS Technologies, later part of computer manufacturer Commodore which was bought and later sold again by Escom, which went broke and of which the Dutch part later re-emerged as Commodore again, after a management buy-out).
Reference:
(Used to be MOS Technologies, later part of computer manufacturer Commodore which was bought and later sold again by Escom, which went broke and of which the Dutch part later re-emerged as Commodore again, after a management buy-out).
Reference:
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