Feb 6, 2006 #1 cpham99 Programmer Joined Feb 3, 2006 Messages 2 Location US Hi all, I've new at this VHDL thing and i'm trying to implement a fixed pattern preamble state machine. Anyone have done this before, please help!!
Hi all, I've new at this VHDL thing and i'm trying to implement a fixed pattern preamble state machine. Anyone have done this before, please help!!