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32-bit addressing(base and offset-problems)

32-bit addressing(base and offset-problems)

32-bit addressing(base and offset-problems)

(OP)
hello,
    We've written code to switch to protected mode. We enabled the A20 line, set the cr0 bit... But when a jump is given to the protected mode code and for clearing the prefetch queue, the system goes without response. We dunno whether our jump reached the correct place. We tried the following
- setting the base in gdt to zero and set the offset to the actual physical address where we the instruction will be loaded.
- setting the base to some value and given the offset correctly.
But of no use...Help out
Here is part of the code

  mov eax, cr0
  or al, 1        ; set protected mode bit
  mov cr0, eax

  mov ax, 0x10
  mov ds, ax      ; load global data selector into ds
  jmp 0x08:0x200  ; transfer control to test kernel        

The above jump gives us the problem
Setting up gdtr
  gdtptr dw 0x20 ; limit (4 slots)
  dd 0x0800 ; base (physical address)

prom:               ; this is where the jmp goes. 512 bytes from the base
[BITS 32]
  mov ax, 0x10
  mov ds,ax        ; not segments anymore: SELECTORS
  mov ss,ax
  mov esi, 0x1fff
  nop
  mov fs,ax
  mov es, ax

Ekanth

RE: 32-bit addressing(base and offset-problems)

Ekanth,
 I  fear u have mis-understood PM address genereation
Its is not like seg-offset addressing.

I'll put it crisply.

1.
I dont find a LGDT instruction in ur code.
Thats the first problem. ( If u r using MASM in DOS,
then u need to explicitly use a .386p directive.
otherwise MASM wont recognize LGDT instruction. )

2. After moving 1 into CR0, the immediate instruction
should be a "JMP" instruction.
( take the mov ax,8 && mov ds,ax code above..)
 
3. GDT is a table which describe addresses.
Ur SEGMENT registers in PM, index into this table.
The entry in the table would describe the range of
addresses ( segment actually ) accesible by the segment.
The base address in the entry of the GDT is used for
address generation, The base address of GDT is not used
for address generation. It merely identifies the location
of GDT to the processor. This is what is done by LGDT
isntruction.

 if u still dont understand, u must take a book
and read about PM. ( intel manual would help u )


Sarnath


Do not rejoice that ur code works.
it might be a special case of an error

RE: 32-bit addressing(base and offset-problems)

(OP)
Hello,
    Thanx anyway. Its OK. We did it all fine. Now we have another problem with idt. Our problem is we loaded the idt into memory and idtr with the value. Now when i raise an interrupt, it isn't routed to its handler(i've written a common handler for all interrupts) but the system reboots.
Any reason...
Thanx
Ekanth

RE: 32-bit addressing(base and offset-problems)

That simply means that u haven't coded properly.


Do not rejoice that ur code works.
it might be a special case of an error

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