I still think that the case is being mis-stated regarding dual channel and memory bandwidth. What you're getting with dual channel is a wider path, not a faster path. If you have a 64-lane highway with a 60 MPH speed limit, you can only move 64 cars at a time. If you have 128 cars to move, then half of them will arrive after the other half. If you expand the highway to 128 lanes, then you can now move twice as many cars in half the time. But the highway still has it's 60 MPH speed limit. If you only have 64 cars to move, it's still going to take you the same amount of time regardless of whether you have 64 or 128 lanes of freeway. You can move more cars in the same amount of time, but you can't move the same number of cars there any faster by going to dual channel.
Sorry to mix metaphors.
I think where people are getting confused is in thinking that the "2" in DDR2 has anything to do with the number of modules, so lets backtrack.
In the beginning there was SDRAM. SDRAM debuted at around 66 MHz and peaked at around 133 MHz. In both cases the memory clock and the I/O bus clock were the same.
Then DDR SDRAM came along. DDR SDRAM started at around 133 MHz, but since DDR transmits data on the rising and falling edge of the clock signal it could send twice as much data at the same clock speed. Therefore the first DDR modules running at 133 MHz were considered 266 MHz effective. Sometimes they were referred to as 133/266. Then a little later we had 166/333, then 200/400. There were even some modules that were produced at even faster speeds (DDR433 and DDR500, running at 217 and 250 MHz respectively) that were popular with overclockers. In all cases the memory clock and the I/O bus clock were the same.
Then came along DDR2 SDRAM. DDR2 took the previous improvements, and added to them another trick. DDR2 runs the I/O bus at twice the speed of the memory cells, whereas before the bus and cells were at a 1:1 ratio, they are at 2:1 in DDR2. With regular DDR, the cells that ran at 200 MHz memory clock were run on a 200 MHz I/O bus clock, but they had an effective 400 MHz speed because they transmitted on the rising and falling edges of the signal. Now with DDR2 those cells still run at 200 MHz memory clock but with a 400 MHz I/O bus clock. This results in twice the data being transferred per cycle (versus DDR SDRAM), and in the case of the 200 MHz memory cells an effective 800 MHz speed.
DDR2 has nothing to do with the number of modules, nor does it have anything to do with single/dual channel modes. It is absolutely possible to run 800 MHz DDR2 memory at 800 MHz in single-channel mode.
So to return to your comment above:
Each memory stick is running at 400MHz. Together in dual-channel, they put out the same bandwidth that a single 800MHz stick can, but each runs at 400MHz separately.
This is not the case. Each module does run at 400 MHz separately. However, each module independently has the same amount of bandwidth as a theoretical "single 800 MHz stick" and is essentially a single 800 MHz stick. However, each stick independently can use only a 64-bit wide bus. But together in dual channel mode they have a combined 128-bit wide bus to use. Bus width has nothing to do with the bus clock.
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