telcomwork
Technical User
Does anyone know where I could find when the G3R and R11 "End of Life" and "End of Support" information is or where it can be found once it's posted?
Thanks,
Jeff
Thanks,
Jeff
Tek-Tips is the largest IT community on the Internet today!
Members share and learn making Tek-Tips Forums the best source of peer-reviewed technical information on the Internet!
-
Congratulations MikeeOK on being selected by the Tek-Tips community for having the most helpful posts in the forums last week. Way to Go!
G3R R11 1
- Thread starter telcomwork
- Start date
- Status
-
1
- #2
The attached link is for Avaya lifecycle notices. Currently there ar e only notices of V2 through 10.
Kevin
Kevin
End of sale for g3r
Title: Product Transition for UN331C Processor
Server Circuit Pack to Avaya S8700 Media Server
Notification Date: March 10, 2003
Updated: 10/23/2003-End of sale date changed from
November 3, 2003 to December 8, 2003
Avaya is taking another step toward a simplified
converged communication infrastructure. Market
acceptance for the Avaya S8700 Media Server,
which supports customer applications such as
contact center, unified communications and
mobility, has been very positive. The S8700 Media
Server will replace servers in the Avaya
portfolio that use the UN331C Processor Circuit
Pack.
Avaya is ending sale for the UN331C Processor
Circuit Pack. The end of sale will be done in
three phases. December 2003 will be the end of
sale of new servers that use UN331C Processor.
May 2004 will be end of sale for UN331C Processor
as an ATM disaster recovery server. November 2004
will be the end of sale of software upgrades to
the UN331C Processor
UN331C Processor for r only
The UN331C controls the system and executes
stored programs that perform call
processing activity and maintenance. The UN331C
is a RISC designed around a MIPS
R3000A CPU operating at 33 MHz. It employs 32-bit
address and data buses to obtain
and execute instructions at a rate approaching 1
instruction per clock cycle. The 256
kbyte instruction cache with burst-mode refill
and 256 kbyte data cache are key to the
performance of the processor. A read/write buffer
chip tailors the UN331C to the call
processing environment.
Peripheral devices residing on the UN331C are
positioned outside the CPU cache
structure and interface to the CPU through the
read/write buffers. These peripherals
include 512 kbytes of ROM for the monitor,
counters/timers, UARTs, control/status/error
registers, and the logic that provides bus
arbitration and the Bus Time-Out feature.
The UN331C interfaces to the 32-bit multiplexed
address/data processor bus (PM-Bus)
and the 32-bit processor expansion bus (PX-Bus).
The PM-Bus is for all processor write
operations and single-word (4-byte) read
operations. Multiple-word or burst reads are
performed using the PM-Bus to transfer the
address to main memory, then the words of
the burst are returned using both the PM-Bus and
PX-Bus.
Da-vi'do
P.S. A message to all,if you want to get the best response to a question, please read FAQ222-2244 first. Also give the type & version of your voice mail & pbx system & preview your post to make sure it is complete & understandable. Be aware that if u don't answer a question, I usually will not continue to help u.
Title: Product Transition for UN331C Processor
Server Circuit Pack to Avaya S8700 Media Server
Notification Date: March 10, 2003
Updated: 10/23/2003-End of sale date changed from
November 3, 2003 to December 8, 2003
Avaya is taking another step toward a simplified
converged communication infrastructure. Market
acceptance for the Avaya S8700 Media Server,
which supports customer applications such as
contact center, unified communications and
mobility, has been very positive. The S8700 Media
Server will replace servers in the Avaya
portfolio that use the UN331C Processor Circuit
Pack.
Avaya is ending sale for the UN331C Processor
Circuit Pack. The end of sale will be done in
three phases. December 2003 will be the end of
sale of new servers that use UN331C Processor.
May 2004 will be end of sale for UN331C Processor
as an ATM disaster recovery server. November 2004
will be the end of sale of software upgrades to
the UN331C Processor
UN331C Processor for r only
The UN331C controls the system and executes
stored programs that perform call
processing activity and maintenance. The UN331C
is a RISC designed around a MIPS
R3000A CPU operating at 33 MHz. It employs 32-bit
address and data buses to obtain
and execute instructions at a rate approaching 1
instruction per clock cycle. The 256
kbyte instruction cache with burst-mode refill
and 256 kbyte data cache are key to the
performance of the processor. A read/write buffer
chip tailors the UN331C to the call
processing environment.
Peripheral devices residing on the UN331C are
positioned outside the CPU cache
structure and interface to the CPU through the
read/write buffers. These peripherals
include 512 kbytes of ROM for the monitor,
counters/timers, UARTs, control/status/error
registers, and the logic that provides bus
arbitration and the Bus Time-Out feature.
The UN331C interfaces to the 32-bit multiplexed
address/data processor bus (PM-Bus)
and the 32-bit processor expansion bus (PX-Bus).
The PM-Bus is for all processor write
operations and single-word (4-byte) read
operations. Multiple-word or burst reads are
performed using the PM-Bus to transfer the
address to main memory, then the words of
the burst are returned using both the PM-Bus and
PX-Bus.
Da-vi'do
P.S. A message to all,if you want to get the best response to a question, please read FAQ222-2244 first. Also give the type & version of your voice mail & pbx system & preview your post to make sure it is complete & understandable. Be aware that if u don't answer a question, I usually will not continue to help u.
- Status
Similar threads
- Locked
- Question
- Locked
- Question