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This is truly a beautiful piece of code. While->up to first stop...then While->from last stop->up to next stop....Multiple whiles segmented in regions. Yep this is probably what I was missing all this time! Thanx a million!

Ok I need a little help here! Code so far... use strict; use warnings; ## Prepare IN/OUT Files ## my $vhdl_filename = $ARGV[0]; my $report_filename = $ARGV[1]; open( FILE_IN, $vhdl_filename ) or die "$!";; open( FILE_OUT, ">$report_filename" ) or die "$!";; my $short_record = ' %6s %-12s ...

Sadly, I see what you mean, but I don't know how to cope with it... My logic is mainly based on replacements on single lines that depend on the content of previous or following lines, so definitely need arrays. The idea was pretty much what rharsh said, except I missed out one thing, you...

Miserably all I get is an empty FILE_OUT... An example FILE_IN is the following: library ieee; use ieee.std_logic_1164.all; use IEEE.STD_LOGIC_UNSIGNED.ALL; use std.textio.all; library work; use work.zpu_config.all; use work.zpupkg.all; use work.txt_util.all; entity zpu_io is port( clk...

It drives me mad, and I really can't find what goes wrong here! [CODE} ## Number of indent spaces ## $indent = " "; ## Prepare IN/OUT Files ## $vhdl_filename = $ARGV[0]; $report_filename = $ARGV[1]; open( FILE_IN, $vhdl_filename ); open( FILE_OUT, ">$report_filename" ); my $short_record = '...

I know am doing something terribly wrong here, but can you give me a hand? $vhdl_filename = $ARGV[0]; open( FILE_IN, $vhdl_filename ); my @buffer = <FILE_IN>; my $short_record = ' %6s %-12s : %-3s %15s'; my $long_record = ' %6s %-12s : %-3s %-15s(%10s %6s %10s)'; my $line; my...

Thanks a lot, I'll look into it.

Ok, I see what you mean, but I think there is no need to do any of these, its getting way more complicated from what I actually need. Well I simply need a find and replace, not a line but a piece of code in my original buffer or @buffer (in my case, that will be this code fragment: entity JK_FF...

Actually replace a whole Entity record in (@buffer), with @tidy_buffer, and leave all other lines (@buffer) intact.

That is exactly what I meant! Two more questions. I need to remove the last ; on the row, for example: addr : in std_logic_vector(maxAddrBit downto minAddrBit)); and not addr : in std_logic_vector(maxAddrBit downto minAddrBit);); And the second one, say I have a buffer (@buffer) and need...

Actually what I want is 'parse the entire log/file then print all the records at once'. Briefly, I keep two buffers, one with the original code and another one with the nicified code as formatting progresses. When formatting's done, I dump my mod. buffer to a file.

Ok, one more question (probably trivial). How can I collect or store everything in a buffer (@buffer) without loosing the formatting, instead of printing it? I can always do later printf @buffer, if needed. I quickly tried, for example: push @buffer, ($i == 0 ? 'port (' : ""), $keys[$i]...

That is excellent! Thanks so much for your time and effort, really do appreciate it!

I've tried this so far: use strict; #use warnings; my @data; #push @data, [split (/\s+/, $_)] for <DATA>; push @data, [split (' ', $_)] for <DATA>; foreach my $row(0..8) { foreach my $col(0..(@data-1)) { printf("%-15s", $data[$row][$col]); } print "\n"; } __DATA__ clk : in...

Not much really, as I said, I got stuck!

Hi all, I am working on a VHDL code beautifier with Perl. I've come to this part of the beautification process and I got really stuck. Assume for example the following piece of VHDl code: entity JK_FF is port( clock : in std_logic; J, K : in std_logic; reset : in std_logic...