library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity sort is
port(reset,clk:in std_logic;
sort_array :in std_logic_vector(3 downto 0);
data_out:out std_logic_vector(3 downto 0));
architecture sort_a of sort is
type sort_array is array (0 to 4)of...